1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device and a semiconductor device fabricated by the same method, and more particularly, to a method of fabricating a semiconductor device which is capable of crystallizing polycrystalline silicon with excellent crystallinity and preventing a substrate from being bent due to a high crystallization temperature upon crystallization, and a semiconductor device fabricated by the same method.
2. Description of the Related Art
Polycrystalline silicon is used in an active device for an organic light emitting display device, normally, thin film transistors (TFTs), which is used to supply current to pixel regions and peripheral driving regions.
In general, the polycrystalline silicon is formed by crystallization of amorphous silicon.
Normally, methods for the crystallization may be largely classified into a low-temperature crystallization method and a high-temperature crystallization method depending on a crystallization temperature, for example, with reference to about 500° C.
An excimer laser annealing (ELA) method using an excimer laser is mainly used as the low-temperature crystallization method. The excimer laser annealing method may use a glass substrate since it is carried out at a crystallization temperature of about 450° C. However, manufacturing cost is high and the substrate is constrained in an optimal size, thereby increasing total cost to fabricate a display device.
The high-temperature crystallization method includes a solid phase crystallization method, a rapid thermal annealing method, and the like. A low-cost annealing method is widely used as the high-temperature crystallization method.
However, since the solid phase crystallization method requires heating at a temperature of more than 600° C. for 20 or more hours for crystallization, many crystal defects are included in the crystallized polycrystalline silicon. Accordingly, sufficient electric field mobility cannot be obtained, the substrate is prone to deform during an annealing process, i.e., a heat treatment process, and lowered crystallization temperature degrades productivity. Because the solid phase crystallization method is also performed at high crystallization temperature, the glass substrate is not allowed to use.
Meanwhile, although the rapid thermal annealing (RTA) method may be accomplished in relatively short time, the substrate is prone to deform due to severe thermal shock and the crystallized polycrystalline silicon has poor electrical characteristics.
Consequently, a low-cost high-temperature annealing method may be required to be used upon the crystallization in order to reduce cost to fabricate the active device. Moreover, there is a need for a high-temperature annealing method using an inexpensive glass substrate, by which the glass substrate is not bent and crystallinity is excellent.
Meanwhile, a method of fabricating a semiconductor device has been disclosed in Korean Patent Publication No. 1997-8658, which includes: depositing an amorphous silicon layer on a substrate; crystallizing the amorphous silicon layer using a laser annealing method; forming an impurity region on the crystallized polycrystalline silicon layer; and activating the impurity region using an RTA process.
Further, a method of fabricating a semiconductor device has been disclosed in Korean Patent Publication No. 1995-9981, which includes: crystallizing an amorphous silicon layer by 50% or less by etching the amorphous silicon layer formed on a substrate and at the same time annealing the amorphous silicon layer; and crystallizing the amorphous silicon layer again using an RTA process, thereby fabricating a polycrystalline silicon thin film crystallized by 90% or more.
However, the foregoing conventional methods include the complicate processes of crystallizing the amorphous silicon and crystallizing the amorphous silicon again while the impurity region is activated at a high temperature. Further, in the foregoing conventional methods, the RTA process for activating the impurity region is generally performed at a very high temperature of 700˜950° C. (e.g., 1,000° C. or more in the case of Korean Patent Publication No. 1995-9981), so that the substrate is likely to be deformed.